FPGA developer specializing in real-time medical video processing
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- auf Anfrage
- 602 00 Brno
- Europa
- cs | en
- 01.08.2024
Kurzvorstellung
Digital Video * HDMI 2.0 * 12G SDI * DisplayPort * Transceivers * External Memory Interfaces * Intel Cyclone 10 GX / Arria 10 GX * Plaform Designer (QSYS) * Board Bringup * Debugging * High-speed Board Layout * Prototyping * Firmware Development
Qualifikationen
Projekt‐ & Berufserfahrung
Principal Investigator, Hyperspectral Imaging Research Project (Festanstellung)
IBSmm Engineering, spol. s r.o., Brno
9/2014
–
6/2016
(1 Jahr, 10 Monate)
Tätigkeitszeitraum
9/2014 – 6/2016
TätigkeitsbeschreibungPrincipal investigator of TA CR project "Research and development of innovative imaging system for more accurate image based navigation during invasive surgeries using hyperspectral imaging". Responsible for overall project management, company / university team synchronization, system architecture definition, opto-mechanical design and system FPGA architecture and implementation. Also applied for a patent (granted) and published the overview of the project on SPIE Photonics conference in Beijing, China.
Eingesetzte QualifikationenAtmel Microchip Technologie, FPGA, Datenbankrecherche - Patentrecherchen
Ausbildung
Applied Informatics
Master of Science
2011
Brno
Brno
Über mich
My professional experience involves over 15 years of developing FPGA designs, mostly for real-time medical video processing. I am also able to design the related hardware and firmware. For the last three years I work as a freelance contractor.
Most of my professional experience involves the development of HDL video processing blocks for low latency video processing and design and implementation of standard digital video protocols and interfaces, such as HDMI 2.0, V-by-One HS or 12G SDI using the protocol standard as a basis for implementation. I have deep knowledge of internal architecture of recent FPGA device families from Intel, including Cyclone V SoC, Arria V SoC, Arria 10 GX and Cyclone 10 GX. I have been responsible for the complete delivery of multiple FPGA designs utilizing DDR3 memory controllers and HSSI transceiver blocks from the definition of product features to production and sustaining.
I have deep analytical skills and a very innovative mindset. I am able to find new applications for a given technology or innovate an existing solution.
Most of my professional experience involves the development of HDL video processing blocks for low latency video processing and design and implementation of standard digital video protocols and interfaces, such as HDMI 2.0, V-by-One HS or 12G SDI using the protocol standard as a basis for implementation. I have deep knowledge of internal architecture of recent FPGA device families from Intel, including Cyclone V SoC, Arria V SoC, Arria 10 GX and Cyclone 10 GX. I have been responsible for the complete delivery of multiple FPGA designs utilizing DDR3 memory controllers and HSSI transceiver blocks from the definition of product features to production and sustaining.
I have deep analytical skills and a very innovative mindset. I am able to find new applications for a given technology or innovate an existing solution.
Weitere Kenntnisse
Real-time Digital Video Processing using FPGAs, High-Speed Serial Interfaces, HDMI 2.0, 12G SDI, V-by-One HS, DisplayPort, External Memory Interfaces, PCI Express, Field Programmable Gate Array, Pinout Definition, Intel Quartus Prime Pro, Intel Cyclone V, Intel Cyclone 10 GX, Intel Arria V SoC, Intel Arria 10 GX, TimeQuest TA, TCL Scripting, Research Project Management, IP Patent Protection and Research, Hardware Design, PCB Layout, Firmware Development
Persönliche Daten
Sprache
- Tschechisch (Muttersprache)
- Englisch (Fließend)
Reisebereitschaft
Europa
Arbeitserlaubnis
- Europäische Union
Home-Office
bevorzugt
Profilaufrufe
1371
Alter
40
Berufserfahrung
15 Jahre und 4 Monate
(seit 07/2009)
Projektleitung
2 Jahre
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