SciCaTec - FPGA SoC Development, Embedded System Architecture, Signal Processing, Video Processing, and Image Processing
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- 70499 Stuttgart
- Weltweit
- de | en
- 12.08.2024
Kurzvorstellung
My website: -Hyperlink entfernt-
Qualifikationen
Projekt‐ & Berufserfahrung
12/2022 – 12/2023
Tätigkeitsbeschreibung
I was designing, implementing, and testing FPGA-SoC designs for a diverse set of Intel FPGASoC.
The application was related to high reliable communication over high distances and with throughputs over 10 GBit/s.
FPGA, Mentor Graphics, Python, Signalverarbeitung
6/2021 – 10/2022
TätigkeitsbeschreibungI was involved in the high-precision 3D point cloud measurement of the environment in LiDAR Application. I implemented the high throughput Signal, Image and Video Processing designs in an Xilinx Zynq Ultrascale+ MPSoC FPGA.
Eingesetzte QualifikationenBildverarbeitung, Digitaler Signalprozessor (DSP), Elektrische Messtechnik, Embedded Linux, Mentor Graphics, Signalverarbeitung
12/2019 – 6/2021
TätigkeitsbeschreibungI was responsible Senior System Architect for Embedded Systems and Embedded Processing. My task was to evaluate, specify, and implement Embedded Processing Systems for Signal, Video, and Image Processing applications based on FPGAs, SoCs, and GPUs including peripheral camera and sensor systems. Furthermore I specified and implemented customized Signal and Image Processing algorithms for computer vision and pulse processing (timing, energy, pileup) device features.
Eingesetzte QualifikationenBildverarbeitung, C++, CUDA, Elektrische Messtechnik, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Linux, Embedded Systems, FPGA, Simulink, Picmicro, Mikroelektronik, Mentor Graphics, Projektleitung / Teamleitung (IT), Signalverarbeitung, Verilog, Hardwarebeschreibungssprache
4/2015 – 3/2018
TätigkeitsbeschreibungI developed for my customer an innovative fully digitale scientific measuring instrument for nuclear application. For this digital data acquisition system for ion beam analysis I developed new SuperSampleRate IIR FIR Filter designs in FPGAs to achieve improved energy (amplitude) resolution for pulse processing.
Eingesetzte QualifikationenC#, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Systems, FPGA, Ingenieurwissenschaft, Mikroelektronik, Mentor Graphics, Naturwissenschaft, Signalverarbeitung, Computer Engineering, Verilog, Hardwarebeschreibungssprache
10/2012 – 11/2019
TätigkeitsbeschreibungAs System Architect digital Hardware for digital Microscopes, I was responsible for architecture concept and development of FPGA and embedded designs for Signal, Video, and Image Processing in the fully digital microscope "Smartzoom 5". In parallel, I held the position of sub-project management of electronics to lead an internal team of developers and coordinated external development partners in international projects. I contributed in the development of the laser scanning microscopes "LSM 880" and "LSM 980", where I transferred user-specific algorithms into high-performance FPGA implementations.
Eingesetzte QualifikationenBildverarbeitung, C#, C++, Elektrische Messtechnik, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Linux, Embedded Systems, FPGA, Mikroelektronik, Mentor Graphics, Projektleitung / Teamleitung (IT), Signalverarbeitung, Computer Engineering, Verilog, Hardwarebeschreibungssprache
5/2012 – 3/2015
Tätigkeitsbeschreibung
I developed for my customer an innovative fully digitale scientific measuring instrument for nuclear application. For this digital TDPAC spectrometer I developed new SuperSampleRate IIR FIR Filter designs in FPGAs to achieve improved time resolution for pulse processing.
Title: [...]
Link to TDPCA spectrometer:
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Link to the data acquisition system for ion beam analysis:
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Link to the doctoral thesis:
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Charakterdesign, Art direction, C#, C++, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Systems, FPGA, Ingenieurwissenschaft, Mikroelektronik, Mentor Graphics, Naturwissenschaft, Signalverarbeitung, Computer Engineering, Verilog, Hardwarebeschreibungssprache
1/2008 – 9/2012
Tätigkeitsbeschreibung
In the field of 3D laser scanning (lidar) I developed and tested the SoC system architecture and high performance FPGA/CPLD designs for signal and data processing. Additionally I developed Hardware close software executed by microcontrollers.
I contributed in the development of the 3D Laser Scanning devices "Trimble CX" and "Trimble TX8".
Bildverarbeitung, C++, Elektrische Messtechnik, Embedded Entwicklung / hardwarenahe Entwicklung, Embedded Linux, Embedded Systems, FPGA, Simulink, Mikroelektronik, Mentor Graphics, Signalverarbeitung, Computer Engineering, Verilog, Hardwarebeschreibungssprache
Ausbildung
Leipzig (GERMANY)
Leipzig (GERMANY)
Leipzig (GERMANY)
Über mich
For further information please visit my website: -Hyperlink entfernt-
Weitere Kenntnisse
FPGA Simulation: Mentor Graphics ModelSim, QuestaSim
Image and Video Processing: DeBayer, ISP, Dead pixel correction, HDR, Image stabilization, Distortion correction, Pixel Shift operation, Color correction, Autofocus, Image sharpness, EDoF, FFT, FWT, Image quality enhancement, Processing pipeline
Signal Processing: digital filters, FIR, IIR, SuperSampleRate filter, SubSample timing, high resolution signal measurement, noise shaping, oversampling
Hardware description language: VHDL, HLS, Verilog
Software Development: MS Visual Studio, GCC, CUDA, Embedded Linux
Programming languages: C#, C++, C, Assembler
Programming environments: MATLAB, Python
Interfaces and Connections: PCI, PCIe, LVDS, MIPI, HDMI, MGT, CAN, I²C, USB, Ethernet, DDR-SDRAM, SRAM, JESD, GigaSample ADC
Sensors: Image Sensors (CCD, CMOS, ISP), Distance Sensors, Acceleration Sensors, Temperature Sensors
Persönliche Daten
- Deutsch (Muttersprache)
- Englisch (Fließend)
- Europäische Union
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