FPGA/ VHDL Consultant - 10 Years

FPGA, Formal Verification, code coverage, coding, Python, debugging, Apollo, UART, SPI, I2S, GPIO, Expander, Verilog, test framework, Xilinx, DOORS, signal processing, data transfer, checksum, Lattice, VHDL, test bench, Tcl, NIOS, 32-bit, C++, JTAG,

• FPGA
• Hardwarebeschreibungssprache

Master in Information & Communication Engineering, University of Sussex


Bachelors in Electronics & Communication Engineering, University of Kent