Junior Network Engineer

12/2018 – 12/2018

Responsibilities as a Team Leader and a Junior Engineer:
- guiding the team (6 people) as they completed the tasks.
- delegated tasks to the members, including myself.
- provide training that the team members needed.
- quality assurance.
- maintaining communication with the client.
- create reports to update the employer on the team's progress.
- researching

Grundlagenforschung, Data Mining, Online Analytical Processing, Projektleitung / Teamleitung (IT), Projektteambildung / -entwicklung

12/2016 – 12/2018

Responsibilities as a Team Leader:
- guiding the team (11 people) as they completed the tasks.
- delegated tasks to the members, including myself.
- provide training that the team members needed.
- quality assurance.
- maintaining communication with the client.
- create reports to update the employer on the team's progress.

Tasks as a Junior Engineer:
- Complete the location polygoning in full accordance to the client’s requirements.
- Maintain the client’s database by entering all requested information.
- Fill the requested form with information for polygons and those with issues by specifying in details what the identified issues are.
- Report the completed work as well as issues identified with polygons.
- Use critical thinking and offers solutions to identified issues.
- Share the knowledge with the team and documents them in the companies' knowledge sharing base.
- Determine requirements by working with costumers.
- Answer inquiries by clarifying desired information; researching, locating and providing solution.
- Resolve problems by clarifying issues; researching and exploring answers and alternative solutions; implementing solutions; escalating unresolved problems.
- Fulfill requests by clarifying desired solution; completing transactions; forwarding requests.
- Update job knowledge by participating in educational opportunities.

Grundlagenforschung, Data Mining, Online Analytical Processing, Projektleitung / Teamleitung (IT), Projektteambildung / -entwicklung

12/2015 – 12/2015

Analysis of a possible migration from Mathworks® HDL Coder into Altera® DSP Builder. The task contains the following steps:

- Familiarization with the basic fundamentals of FPGAs and the tools HDL Coder and DSP Builder.
- Implementation of an HDL Coder-example. The implementation has been tested on an FPGA.
- Analysis of the mathematical function "2D Linear Interpolation Look Up Table" in the tool Mathworks® HDL Coder.
- Migration of the function "2D Linear Interpolation Look Up Table" of Mathworks® HDL Coder into the tool Altera® DSP Builder.
- Investigation of an FPGA optimization of the function "2D Linear Interpolation Look Up Table" with the tool Altera® DSP Builder. Here, the tool functions "ALU Folding" and "Multichannalization" were analyzed and tested. The optimization was successfully tested with the interaction of both functions and put into operation in order to achieve the best possible optimization results.

Used tools/devices/programming language to complete the task: Mathworks® Matlab, Mathworks® HDL Coder, Altera® DSP Builder, Altera® Quartus Prime, Altera@ ModelSim, LABCAR Operator, RTPC, FPGA Device, vhdl code, tcl scripting.

Altera (allg.), Digitaler Signalprozessor (DSP), FPGA, Quartus (Altera), Hardwarebeschreibungssprache, Simulink, Tool Command Language