SV-UVM VERIFICATION ENGINEER
- Verfügbarkeit einsehen
- 1 Referenz
- 50€/Stunde
- 85716 Unterschleißheim
- Europa
- bn
- 09.08.2018
Kurzvorstellung
Auszug Referenzen (1)
"YES,"
5/2017 – 6/2018
Tätigkeitsbeschreibung
Leading the team of JB4 and also responsible for developing the environment & coding testcases for various features of JB4 using SV & UVM.
Executed regressions & responsible for Code and Functional Coverage Closures.
Created assertion based checker for HCEn to FCEn mapping and AC timing parameter for Host side.
Helping in NOC verification by porting tests and debugging.
Digitale Elektronik
Qualifikationen
Projekt‐ & Berufserfahrung
5/2017 – 6/2018
Tätigkeitsbeschreibung
Leading the team of JB4 and also responsible for developing the environment & coding testcases for various features of JB4 using SV & UVM.
Executed regressions & responsible for Code and Functional Coverage Closures.
Created assertion based checker for HCEn to FCEn mapping and AC timing parameter for Host side.
Helping in NOC verification by porting tests and debugging.
Digitale Elektronik
Ausbildung
BANGALORE
BANGALORE
Weitere Kenntnisse
Persönliche Daten
- Bengalisch (Muttersprache)
- Europäische Union
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