Hardware Security Engineer

7/2013 – 5/2016

• FPGA implementation of various error-correction schemes as well as cryptographic mechanisms such as Reed-Muller, GRACE, Reed-Solomon, CRC and repetition in VHDL.

• Hardware/ Software Co-Design for PUF-based security solutions on the Xilinx Zynq-7000 board.

• Hardware Design, implementation and evaluation of a PUF noise behaviour emulator in VHDL on the Xilinx Kintex-7 FPGA board.

• Design, implementation and synthesis of a random number generator based on Galois-LFSR in VHDL on the Virtex-5 FPGA board using Xilinx ISE and UART peripheral interface to display the output.

• Design, Implementation and Evaluation of the Multiple Ring Oscillator TRNG (MURO-TRNG) in VHDL on the Kintex-7 FPGA board using Xilinx PlanAhead and FPGA Editor.

Embedded Entwicklung / hardwarenahe Entwicklung, Hardwarebeschreibungssprache, Xilinx (allg.), Mentor Graphics, Vivado (Xilinx), Lithografie, FPGA, Objective-C