Senior Digital Hardware Design Engineer

Architecture and RTL design of ultra high speed communication network devices for FPGA's and ASIC's. Ultra high speed data processing design from scratch to running prototype.
10/25/100 Gbps Ethernet, virtual processors, image/video processing, etc

• Altera (allg.)
• Embedded Entwicklung / hardwarenahe Entwicklung
• Field Programmable Gate Array (FPGA)
• Objective-C
• Python
• VHDL (VHSIC Hardware Description Language)
• Vivado (Xilinx)
• Xilinx (allg.)

FPGA, ASIC, VHDL, Xilinx, Altera, Vivado, Vivado HLS, ARM, C, C++, Python, 10/25/100G Ethernet, PCB Design, multilayer PCB, High speed design, High Speed Interfaces, DDR2, DDR3, DDR4, QDRAM, RLDRAM. Image and Video Digital Hardware Processing, Digital Signal Processing, Real Time Control